Oberon RTK

SPIdata

libv2 Data IO via SPI devices. HW-buffered, busy-waiting.

Updated: 2024-11-10

Purpose

Data IO procedures, master mode, 8 bits, MSB first for now
HW-buffered (FIFO)
Busy-waiting (blocking) while transmitting and receiving

See Also

See also: SPIdev.mod, example program SPIrtc2

Repository

SPIdata.mod