Change Note 2025-07-07

Pico2-Ice Board

• Split the board support into three modules:
  • ICE40UP5K: basics for the iCE FPGA sans configuration;
  • IceCfgCram: directly write config bitstream data into the FPGA’s configuration RAM (CRAM);
  • IceCfgFlash: write the config bitstream data into the FPGA’s dedicated flash memory on the board, from where the iCE chip will load it upon start-up.
• Simplify the configuration: one single procedure per configuration method, see the corresponding example programs.
• Add writing and reading SPI flash memory.

Module Library (lib/v2.1)

Module ICE40UP5K

• Pin and parameter definitions.
• Provide the clock to the FPGA via GPIO.
• Start and stop the FPGA.

New Module IceCfgCram

• Write the FPGA bitstream data directly into the configuration RAM.
• See example program IceCram.

New Module IceCfgFlash

• Write the FPGA bitstream data into the flash memory dedicated to the iCE chip.
• See example program IceFlash.

New Module W25Q32JV (Flash Memory)

• Write (program) and read the W25Q32JV flash memory chip via SPI.
• Standard SPI instructions supported (the chip also has dual and quad modes); no support for write protection and similar features yet.

Module GPIO

• Rename ResetPad to ResetPin.

Module SPIdev

• Add procedure ApplyReset: (re-) apply the reset controller’s reset condition.

Example Programs

• IceCram: re-implement to use the new CRAM configuration procedure in IceCfgCram.
• IceFlash: program the configuration flash memory, start the FPGA, which then reads its configuration autonomously from the flash memory into CRAM.
• TestFlash: some basic tests for writing and reading the flash memory (in directory of IceFlash).

Infrastructure

• As sort of a dog-food test, all changes and additions above have been developed, tested, and deployed on and from macOS, without ever resorting to Windows.
• I have been using the ZOC terminal program lately, which is available for both Windows and macOS.