Anatomy/Concepts Concepts Conceptual and technical building blocks Program Startup How a program gets up-and-running – from Cortex-M reset through to the program's own entry point Device Modules Representation and set-up of peripheral devices in software Kernel-v1: Description Concepts, features, limitations Kernel-v4: Description Architecture, concepts, and programming model of the preemptive, event-driven kernel-v4 Memory Management Configuration and allocation Run-time Errors Error and Fault handling Stacktraces Creating stacktraces Two Processor Cores Implications for program design and implementation Timers and Timing Timing with the timer device Text Output and Input The terminal output/input infrastructure Secure/Non-secure Program Structure The structure of an S/NS program for TrustZone-enabled Cortex-M33 MCUs Secure/Non-secure Program Design Design rules and guidelines for TrustZone S/NS separation Flash Memory RP Loading code from flash memory, SRAM, or cache Compiler Memory Allocation How the Astrobe compiler allocates memory Inter-core Messages Send and receive messages to and from the other core